| 摘要 |
There is provided a method of forming a semiconductor device. According to the method, a gate pattern having a capping insulating layer is formed on a substrate, a first etch stop layer is conformably formed. A first interlayer insulating layer having a planarized upper surface, a second etch stop layer and a second interlayer insulating layer are sequentially formed on the first etch stop layer. A first opening and a second opening are formed. The first opening penetrates the second interlayer insulating layer, the second etch stop layer, the first interlayer insulating layer, the first etch stop layer and the capping insulating pattern to expose the gate electrode, and the second opening penetrates the second interlayer insulating layer, the second etch stop layer, the first interlayer insulating layer and the first etch stop layer to expose the substrate. The forming the first and second openings includes at least one selective etching process and a nonselective etching process.
|
