发明名称 Memory device, memory circuit and semiconductor integrated circuit having variable resistance
摘要 A first variable resistor (5) is connected between a first terminal (7) and a third terminal (9) and increases/reduces its resistance value in accordance with the polarity of a pulse voltage applied between the first terminal (7) and the third terminal (9). A second variable resistor (6) is connected between the third terminal (9) and a second terminal (8) and increases/reduces its resistance value in accordance with the polarity of a pulse voltage applied between the third terminal (9) and the second terminal (8). Given pulse voltages are applied between the first terminal (7) and the third terminal (9) and between the third terminal (9) and the second terminal (8) to reversibly change the resistance values of the first and second variable resistors (5, 6), thereby recording one bit or multiple bits of information.
申请公布号 US7463506(B2) 申请公布日期 2008.12.09
申请号 US20040584617 申请日期 2004.10.22
申请人 PANASONIC CORPORATION 发明人 MURAOKA SHUNSAKU;OSANO KOICHI;TAKAHASHI KEN;SHIMOTASHIRO MASAFUMI
分类号 G11C11/00;G11C11/56;G11C13/00;G11C16/02;H01L27/24;H01L45/00 主分类号 G11C11/00
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