| 摘要 |
A method of manufacturing a self-aligned fin FET (FinFET) device is disclosed, in which, an insulating layer of a shallow trench isolation is etched back to partially expose sidewalls of the semiconductor substrate surrounded by the shallow trench isolation, and the sidewalls of the semiconductor substrate are then isotropically etched, allowing the semiconductor substrate to form into a relatively thin fin structure for forming a three-dimensional gate structure having three faces.
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