发明名称 Methods of forming dual-damascene interconnect structures using adhesion layers having high internal compressive stresses
摘要 Methods of forming interconnect structures include forming a first metal wiring pattern on a first dielectric layer and forming a capping layer (e.g., SiCN layer) on the first copper wiring pattern. An adhesion layer is deposited on the capping layer, using a first source gas containing octamethylcyclotetrasilane (OMCTS) at a volumetric flow rate in a range from about 500 sccm to about 700 sccm and a second gas containing helium at a volumetric flow rate in a range from about 1000 to about 3000 sccm. The goal of the deposition step is to achieve an adhesion layer having an internal compressive stress of greater than about 150 MPa therein, so that the adhesion layer is less susceptible to etching/cleaning damage and moisture absorption during back-end processing steps. Additional dielectric and metal layers are then deposited on the adhesion layer.
申请公布号 US7459388(B2) 申请公布日期 2008.12.02
申请号 US20060470320 申请日期 2006.09.06
申请人 SAMSUNG ELECTRONICS CO., LTD.;CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KIM JAEHAK;RESTAINO DARRYL D.;WIDODO JOHNNY
分类号 H01L21/4763 主分类号 H01L21/4763
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