| 摘要 |
An integrated circuit and operation method thereof is provided to prevent a margin error due to a skew by detecting skew information corresponding to a process, a voltage and temperature applied to the integrated circuit. In an integrated circuit, a clock sampling unit samples the reference clock during the section defined with the delay time. A clock counting unit counts the sampled reference clock(CLK REF). A skew signal generating unit generates the skew information signal in response to the counting value of the clock counting unit.(DET_F,DET_T,DET_S). A clock sampling unit outputs a clock for toggling signal during the defined section. A clock counting unit outputs a code signal of N(N is the natural number) - bit corresponding to the clock number of the clock signal for toggling signal.
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