| 摘要 |
A power factor correction (PFC) controller and method uses a finite state machine (304) to adjust the duty cycle of a pulse width modulation (PWM) switching control signal (CSo). The PFC controller has a target current generator (300) that receives the link output voltage ( Vcic(t)) and generates a target current (V(itarget) ) proportionate to the rectified line input voltage (Vxic (t) ). The PFC controller further includes a comparator (303) which outputs a two-level current comparison result signal. The finite state machine (304) responsive to the two-level current comparison result signal, generates a switch control signal (CSo) that has a duty cycle which is adjusted for controlling the switch so that the sensed current is approximately proportionate to the rectified line input voltage, such that power factor correction is performed. |
