发明名称 |
FILTER CIRCUIT ELEMENT AND ELECTRONIC CIRCUIT DEVICE |
摘要 |
<p>A plurality of vias are adjacently arranged on a multilayer substrate, one outer side first via among the vias is electrically connected to a first extraction line arranged on the multilayer substrate, and the other outer side second via is electrically connected to a second extraction line arranged on the multilayer substrate. The vias are connected to a first fixed potential layer (for instance, a ground layer) of the multilayer substrate. Between the first and second extraction lines and the fixed potential layer, at least one layer of a second fixed potential layer at a potential same as that of the first fixed potential layer is arranged as an inner layer of the multilayer substrate through the vias and a clearance. Thus, a BPF having a low area occupancy is formed on the multilayer substrate without adding an extra manufacturing step.</p> |
申请公布号 |
WO2008133010(A1) |
申请公布日期 |
2008.11.06 |
申请号 |
WO2008JP57003 |
申请日期 |
2008.04.09 |
申请人 |
NEC CORPORATION;ELPIDA MEMORY, INC.;NAKANO, TAKASHI;IMAZATO, MASAHARU;NISHIO, YOJI |
发明人 |
NAKANO, TAKASHI;IMAZATO, MASAHARU;NISHIO, YOJI |
分类号 |
H01P1/205;H01P3/08;H05K3/46 |
主分类号 |
H01P1/205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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