FILTERLESS DIGITAL FREQUENCY LOCKED LOOP

摘要

A frequency and/or phase locked loop architecture that eliminates the loop filter generally required in conventional phase locked loops, and which may be implemented in digital logic, for example, as a field programmable gate array. In one example, a frequency/phase locked loop includes both a frequency comparison component and a phase comparison component to allow locking of an output clock signal to both the frequency and phase of a reference signal.