Normalization and rounding of an arithmetic operation result

摘要

An arithmetic operation unit, which generates shift information representing whether or not an arithmetic operation result has been shifted when the arithmetic operation result is normalized, has an arithmetic logical unit for outputting the arithmetic operation result, a normalizer (30) having a plurality of shifters for normalizing the arithmetic operation result, a shift amount calculator for calculating a plurality of shift amounts for the plural shifters, and a predictor (51) for generating interim information that is a result of prediction of whether or not the arithmetic operation result is to be shifted when the arithmetic operation result is normalized, by using the plural shift amounts, and a generator (52) for generating the shift information by using the interim information. The cycle time required to generate the interim information (a sticky bit) is shortened to efficiently generate the sticky bit, and the hardware resources for generating the sticky bit are reduced.