发明名称 |
Sense amplifier for semiconductor memory device |
摘要 |
A direct sense amplifier of the present invention incorporates and isolates: an MOS transistor serving as a differential pair and having a gate connected to a bit line; and an MOS transistor controlled by a column select line wired between RLIO lines in a bit-line direction, and further connects a source of the MOS transistor serving as the differential pair to a common source line wired in the word-line direction. Since the direct sense amplifier only in a select map is activated by the column select line and the common source line during an read operation, power consumption is significantly reduced during the read operation. Also, since a parasitic capacitance of the MOS transistor serving as the differential pair is separated from the local IO line, a load capacity of the local IO line is reduced and the read operation is speeded up. In addition, during the read operation, a data pattern dependency of the load capacity of the local IO line is reduced and a post-manufacture test is easily made.
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申请公布号 |
US7447091(B2) |
申请公布日期 |
2008.11.04 |
申请号 |
US20070706409 |
申请日期 |
2007.02.15 |
申请人 |
HITACHI, LTD.;ELPIDA MEMORY, INC.;HITACHI ULSI SYSTEMS CO., LTD. |
发明人 |
SEKIGUCHI TOMONORI;MIYATAKE SHINICHI;SAKATA TAKESHI;TAKEMURA RIICHIRO;NODA HIROMASA;KAJIGAYA KAZUHIKO |
分类号 |
G11C7/02;G11C5/06;G11C7/06;G11C7/08;G11C7/10;G11C7/12;G11C7/18;G11C8/08;G11C11/408;G11C11/4091;G11C11/4094;G11C11/4096;G11C11/4097;H01L21/8242;H01L27/02;H01L27/108 |
主分类号 |
G11C7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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