发明名称 Method and apparatus to reduce internal circuit errors in a multi-bit delta-sigma modulator
摘要 An N-bit delta-sigma modulator reduces circuit errors associated with an internal N-bit digital-to-analog converter by replacing the N-bit digital-to-analog converter with a digital feedback circuit comprising a ternary digital-to-analog converter and an (N-1)-bit digital-to-analog converter. The internal N-bit digital-to-analog converter is typically used to generate a global feedback signal that is provided to a first summation circuit. To provide an equivalent function but with better noise transfer characteristics, the digital feedback circuit generates two feedback signals. The ternary digital-to-analog converter is part of a first feedback path that generates a first feedback signal for the first summation circuit, and the (N-1)-bit digital-to-analog converter is part of a second feedback path that generates a second feedback signal for the first summation circuit or a subsequent summation circuit.
申请公布号 US7446687(B2) 申请公布日期 2008.11.04
申请号 US20070856638 申请日期 2007.09.17
申请人 REALTEK SEMICONDUCTOR CORP. 发明人 LIN CHIA-LIANG
分类号 H03M3/00 主分类号 H03M3/00
代理机构 代理人
主权项
地址