| 摘要 |
A pair of measuring switches S 21, S 22 is interposed between both terminals of a capacitor C, and inputs T 1, T 2 of AID converters 11 c, 11 d via resistors R 1, R 2. A pair of measuring switches S 23, S 24 is interposed between both inputs T 1, T 2 and a ground. The CPU 12 a controls the measuring switches S 21 to S 24 so that when a terminal "a" of the capacitor C is positive charged, while the other terminal "b" of the capacitor C is grounded, both terminals "a" and "b" are respectively connected to the inputs T 1 and T 2. The CPU 12 a controls the measuring switches S 21 to S 24 so that when the terminal "b" of the capacitor C is positive charged, while the terminal "a" of the capacitor C is grounded, both terminals "a" and "b" are respectively connected to the inputs T 1 and T 2.
|
