发明名称 DEEP POWER DOWN GENERATING CIRCUIT FOR PREVENTING MULFUNCTION IN POWER-UP
摘要 A power-down generating circuit for preventing mulfunction in power-up is provided to prevent mulfuction of a semiconductor memory device by making a deep power-down disable at the beginning of power up even if the deep power-down command is generated. In a memory device, a deep power-down generating block(100) generates a deep power-down and is enabled in response to a deep power-down command. A deep down enable block(200) is enabled a chip selection signal and is suppressed in case that a power-up signal is disable. A chip selection response unit enables a deep power enable signal in response to inversed chip selection signal and is enabled in response to a selection enable signal.
申请公布号 KR100866052(B1) 申请公布日期 2008.10.30
申请号 KR20070038653 申请日期 2007.04.20
申请人 FIDELIX CO., LTD. 发明人 LIM, YANG KYU
分类号 G11C5/14 主分类号 G11C5/14
代理机构 代理人
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