| 摘要 |
A data encoder (14). The novel encoder (14) includes a first circuit (24) for generating a fundamental sequence coded data stream from an incoming input data stream, a second circuit (22) for generating a k-split data stream from the incoming data stream, and a third circuit (26) for combining the fundamental sequence coded data stream and k-split data stream to form a final encoded output. The first circuit (24) includes a circuit (30) for converting the incoming input data stream into a novel intermediate format comprising a set bit word and a zero word count, and a zero-word expander (34) for converting the intermediate format to the fundamental sequence coded data stream. The first circuit (24) may also include a register (32) adapted to store the intermediate format to provide rate buffering. |
