摘要 |
A semiconductor integrated circuit includes S PLLs (S is an integer satisfying S>=2), and the (k-1)th PLL 12<SUB>(k-1) </SUB>(k is an integer satisfying 2<=k<=S) is connected to the kth PLL 12<SUB>k </SUB>in the test mode. In this manner, the examination of S PLLs can be performed in a single test, and thereby it can reduce the time needed to examine PLLs for the in semiconductor integrated circuit having a plurality of PLLs.
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