发明名称 METHODS TO REDUCE THRESHOLD VOLTAGE TOLERANCE AND SKEW IN MULTI-THRESHOLD VOLTAGE APPLICATIONS
摘要 A circuit and a method for adjusting the performance of an integrated circuit, the method includes: comprising: (a) measuring the performance of a first monitor circuit having at least one field effect transistor (FET) of a first set of FETs, each FET of the first set of FETs having a designed first threshold voltage; (b) measuring the performance of a second monitor circuit having at least one field effect transistor (FET) of a second set of FETs, each FET of the second set of FETs having a designed second threshold voltage, the second threshold voltage different from the first threshold voltage; and (c) applying a bias voltage to wells of the FETs of the second set of FETs based on comparing a measured performance of the first and second monitor circuits to specified performances of the first and second monitor circuits.
申请公布号 US2008265983(A1) 申请公布日期 2008.10.30
申请号 US20080169705 申请日期 2008.07.09
申请人 BARROWS COREY KENNETH;KEMERER DOUGLAS W;SHUMA STEPHEN GERARD;STOUT DOUGLAS WILLARD;STROHACKER OSCAR CONRAD;STYDUHAR MARK STEVEN;ZUCHOWSKI PAUL STEVEN 发明人 BARROWS COREY KENNETH;KEMERER DOUGLAS W.;SHUMA STEPHEN GERARD;STOUT DOUGLAS WILLARD;STROHACKER OSCAR CONRAD;STYDUHAR MARK STEVEN;ZUCHOWSKI PAUL STEVEN
分类号 G05F1/44 主分类号 G05F1/44
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