| 摘要 |
A technique is provided which makes it possible to achieve both of a reduction in contact resistance in a memory device and a reduction in contact resistance in a logic device even when oxidation is performed during formation of dielectric films of capacitors. Conductive barrier layers ( 82 ) are provided in the top ends of contact plugs ( 83 b) electrically connected to ones of source/drain regions ( 59 ). Lower electrodes ( 70 ) of capacitors ( 73 ) are formed in contact with the conductive barrier layers ( 82 ) of the contact plugs ( 83 b) and then dielectric films ( 71 ) and upper electrodes ( 72 ) of the capacitors ( 73 ) are sequentially formed. In the logic region, contact plugs ( 25 ) are formed in an upper layer so that they are in contact respectively with contact plugs ( 33 ) electrically connected to source/drain regions ( 9 ).
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