发明名称 Modular design of multiport memory bitcells
摘要 The present invention provides a system and method for designing and modularly expanding multiport bitcells. A modular design approach is described that reduces the complexity of designing multiport bitcells while complying with DFM rules across various semiconductor fabrication providers. The modular design may be parsed into modules such as read port modules, write port modules, and pull-up modules that may be easily interconnected to build a multiport bitcell. These modules may also be independently sized and assembled to achieve desired read margins, write margins, static noise margins as well as read access times and write times.
申请公布号 US7440356(B2) 申请公布日期 2008.10.21
申请号 US20060487061 申请日期 2006.07.13
申请人 LSI CORPORATION 发明人 VENKATRAMAN RAMNATH;CASTAGNETTI RUGGERO;RAMESH SUBRAMANIAN
分类号 G11C8/00 主分类号 G11C8/00
代理机构 代理人
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