发明名称 Clock architecture for multi-processor systems
摘要 In one embodiment, a computer system, comprises at least a first computing cell and a second computing cell, each computing cell comprising at least one processor, a routing device to couple the first and second computing cells, a global clock signal source coupled to the at least two computing cells to generate a global clock signal, at least one timing manager to generate a timing control signal, wherein the at least two computing cells comprise a local oscillator to generate a local clock signal, and a multiplexer coupled to receive the global clock signal, the local clock signal, and the timing control signal, and to output one of the global clock signal or the local clock signal in response to the control signal.
申请公布号 US2008256379(A1) 申请公布日期 2008.10.16
申请号 US20070786125 申请日期 2007.04.11
申请人 ARUMUGHAM RANGASWAMY;SHAW MARK;HERRELL RUSS W;PALLOTTI LISA 发明人 ARUMUGHAM RANGASWAMY;SHAW MARK;HERRELL RUSS W.;PALLOTTI LISA
分类号 G06F1/06 主分类号 G06F1/06
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