| 摘要 |
A data output circuit of a semiconductor memory apparatus is provided to reduce the number of signals for data output. A data output control unit(100) generates a selection signal, an output timing signal and an input control signal in response to a read command and a clock. A signal response data output unit(200) receives parallel data in response to the input control signal, and arranges the parallel data in response to the selection signal, and outputs the arranged parallel data by synchronizing the parallel data with the output timing signal as serial data sequentially.
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