发明名称 Integrated Circuit, Method for Manufacturing an Integrated Circuit, Memory Cell Array, Memory Module, and Device
摘要 According to one embodiment of the present invention, a memory cell array comprises a plurality of voids, the spatial positions and dimensions of the voids being chosen such that mechanical stress occurring within the memory cell array is at least partly compensated by the voids.
申请公布号 US2008253166(A1) 申请公布日期 2008.10.16
申请号 US20070735864 申请日期 2007.04.16
申请人 RABERG WOLFGANG;PINNOW CAY-UWE 发明人 RABERG WOLFGANG;PINNOW CAY-UWE
分类号 H01L21/31;G11C11/00 主分类号 H01L21/31
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