Integrated circuits such as programmable logic device integrated circuits with memory interface circuitry are provided. The memory interface circuitry measures the timing characteristics of an associated memory during a series of dummy read operations. A multiplexer and phase detector are used to measure phase shifts of memory group clock signals compared to a system clock signal. The memory interface circuitry uses these measurements to adjust a delay- locked- loop circuit. The delay- locked- loop circuit produces a capture clock that is used to read data from the memory.
申请公布号
WO2007117539(A3)
申请公布日期
2008.10.16
申请号
WO2007US08469
申请日期
2007.04.03
申请人
ALTERA CORPORATION;BURNEY, ALI, H.;CHARAGULLA, SANJAY, K.