发明名称 |
Fabrication process for silicon-on-insulator field effect transistors using high temperature nitrogen annealing |
摘要 |
Disclosed is a method of fabricating a silicon-on-insulator (SOI) device that enables high device densities and mitigates variances in carrier mobility and saturation drain current (Id<SUB>sat</SUB>). The fabrication method incorporates one or more high temperature nitrogen anneal processes. The high temperature nitrogen anneal nitridizes the interfaces between the n-well and p-well silicon islands and the buried oxide layer. The high temperature nitrogen anneal also nitridizes the interfaces between the n-well and p-well silicon islands and the shallow trench isolation structure. The presence of diffused nitrogen at these interfaces substantially prevents compressive stresses on the n-well and p-well silicon islands, and substantially prevents upward bending of the n-well and p-well silicon islands, which cause variances in carrier mobility and Id<SUB>sat</SUB>.
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申请公布号 |
US2008254590(A1) |
申请公布日期 |
2008.10.16 |
申请号 |
US20070783598 |
申请日期 |
2007.04.10 |
申请人 |
VOGT ERIC E;FECHNER PAUL S |
发明人 |
VOGT ERIC E.;FECHNER PAUL S. |
分类号 |
H01L21/76 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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