发明名称 BISTABLE NONVOLATILE MEMORY CIRCUIT
摘要 PURPOSE:To stabilize the erasing action of the memory information by inserting MNOS memory FET into each signal feedback line of the bistable multivibrator and then connecting the FET in which the gate is connected to the common signal line in parallel to the MNOS memory FET. CONSTITUTION:The sources of switching enhansment-type MOSFET-T1 and T2 are connected to earth line 9; the drains are connected to the sources of load depression type MOSFET-T9 and T10; and the gates are connected to MNOS memory FET-MT13 and MT14 to which voltage MG of control line 11 is supplied in common. And the drains of MT13 and MT14 are connected to connection points A and B. At the same time, enhancement-type FET-T11 and T12 are connected in parallel to MT13 and MT14, and common signal line 12 is connected to the gates of T11 and T12 each. When T11 and T12 are turned on with the prescribed voltage, the information of the bistable multivibrator comprising T1, T2, T9, T10, MT13 and MT14 each is written into MT13 and MT14. And if the prescribed voltage is applied to line 11, the memory information is erased.
申请公布号 JPS5597091(A) 申请公布日期 1980.07.23
申请号 JP19790003625 申请日期 1979.01.16
申请人 NIPPON ELECTRIC CO 发明人 YAMAUCHI ETSUROU
分类号 G11C14/00 主分类号 G11C14/00
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