发明名称 Semiconductor memory device capable of achieving narrower distribution width of threshold voltages of memory cells and method of data write in the same
摘要 When a data write sequence is started, initially, write data is latched in a data latch circuit corresponding to one memory mat. Then, a program pulse is applied to the memory mat, and data read from a memory cell, which is a data write target bit in the memory mat, is performed. Thereafter, verify determination of the memory mat is performed. After a verify operation for the memory mat is completed, a program pulse is applied to another memory mat, and a verify operation for another memory mat is performed.
申请公布号 US2008239826(A1) 申请公布日期 2008.10.02
申请号 US20080076787 申请日期 2008.03.24
申请人 RENESAS TECHNOLOGY CORP. 发明人 OGAWA TOMOYA;ITO TAKASHI;MITANI HIDENORI;KONO TAKASHI
分类号 G11C16/34 主分类号 G11C16/34
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