| 摘要 |
PROBLEM TO BE SOLVED: To provide a method and a system for estimating an impurity profile of a field effect transistor, in which the amount of impurity pileup can be evaluated efficiently, even if the transistor has a short gate length and/or gate insulating film thickness is small. SOLUTION: The method is to estimate the impurity profile by dividing into a first region shallower than the edge of a depletion layer in a semiconductor substrate and a second region deeper than the first region. Characteristics values (for example, threshold voltage) are computed from the drain current data to a plurality of combinations of substrate bias and drain voltage, and the impurity profile of the second region is estimated, based on the amount of the difference of the characteristic value, when changing the substrate bias, without having to change the drain voltage and the amount of the difference of the characteristics values, when changing the drain voltage, without changing the substrate bias (S105-S109). The impurity profile of the first region is estimated, based on the characteristic value and the estimated impurity profile of the second region (S110-S113). COPYRIGHT: (C)2009,JPO&INPIT
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