发明名称 Halbleiter-Anordnung und Herstellungsverfahren dafür
摘要 <p>A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.</p>
申请公布号 DE69435045(T2) 申请公布日期 2008.10.02
申请号 DE1994635045T 申请日期 1994.09.20
申请人 SEMICONDUCTOR ENERGY LABORATORY CO. LTD. 发明人 KONUMA, TOSHIMITSU;SUGAWARA, AKIRA;UEHARA, YUKIKO;ZHANG, HONGYONG;SUZUKI, ATSUNORI;OHNUMA, HIDETO;YAMAGUCHI, NAOAKI;SUZAWA, HIDEOMI;UOCHI, HIDEKI;TAKEMURA, YASUHIKO
分类号 H01L21/316;H01L21/311;H01L21/321;H01L21/336;H01L27/12;H01L29/45;H01L29/786 主分类号 H01L21/316
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