| 摘要 |
<p>A method for determining a signal (Y) of output samples (y(t)) of a digital logic circuit (100. 200. 300), each of said output samples (y(t)) corresponding to a respective input sample (x(t)) of a signal (X) of time-varying input samples (x(t)), comprising: inputting said signal (X) of input samples (x(t)) into said digital logic circuit (100, 200, 300), determining an actual output sample (y(t o )) for an actual input sample (x(t o )) by using an iterative process taking into account a preceding output sample (y(t o -T)), which corresponds to an input sample (x(t o -T)) preceding in said signal (X) of input samples (x(t));
wherein said output samples (y(t)) approximate a desired processed form of said input samples (x(t)) by using an approximation of the underlying desired process which is realized by said iterative process. A corresponding digital logic circuit (100, 200, 300) and a computer program code are presented as well.</p> |
