| 摘要 |
PROBLEM TO BE SOLVED: To provide a CMOS circuit capable of performing a stabilized high-speed operation while reducing power consumption. SOLUTION: The CMOS circuit according to the present invention comprises an inverter circuit having a first N-channel MOS transistor and a first P-channel MOS transistor, a second N-channel MOS transistor, and a second P-channel MOS transistor. As for the first N-channel MOS transistor and the first P-channel MOS transistor, a gate and a drain are connected to an input terminal and an output terminal in common, respectively. As for the second N-channel MOS transistor, a gate is connected to an output terminal, a drain is connected to a source of the first N-channel MOS transistor and grounded through a resistor, and a source is grounded. As for the second P-channel MOS transistor, a gate is connected to an output terminal, a drain is connected to a power supply through a resistor along with a source of the first P-channel MOS transistor, and a source is connected to the power supply. COPYRIGHT: (C)2008,JPO&INPIT
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