发明名称 CPU POWER SAVING SYSTEM AND POWER SAVING METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To solve a problem that fine frequency switching cannot be performed and maximum power saving while securing a throughput is difficult in a conventional CPU power saving method since a frequency switching condition is a single threshold and the condition is changed when frequency switching occurs frequently. <P>SOLUTION: A CPU power control means 101 compares a current CPU utilization rate of its own CPU acquired by a current CPU utilization rate acquisition means 102 with each of a minimum CPU utilization rate and a maximum CPU utilization rate, and lowers the own CPU frequency by one level when the current CPU utilization rate of the own CPU is lower than the minimum CPU utilization rate and the current CPU frequency of the own CPU is not minimum. On the contrary, the own CPU frequency is raised by one level when it is determined that the current CPU utilization rate of the own CPU is higher than the maximum CPU utilization rate and the current CPU frequency of the own CPU is not maximum. Thus, the CPU frequency is lowered to save power when the CPU utilization rate is low, and throughput reduction can be avoided when the CPU utilization rate is high. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2008217628(A) 申请公布日期 2008.09.18
申请号 JP20070056564 申请日期 2007.03.07
申请人 NEC CORP 发明人 KADOHIRO TAKASHI
分类号 G06F1/04 主分类号 G06F1/04
代理机构 代理人
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