| 摘要 |
The present invention provides a test apparatus that tests a plurality of memories under test. The test apparatus includes a data input-output section that gives and receives data to and from data input-output terminals of the plurality of memories under test, a test data supplying section that parallel supplies test data to the plurality of memories under test, a writing control section that parallel supplies a write enable signal to the plurality of memories under test, a reading control section that sequentially supplies a read enable signal to each of the plurality of memories under test, a comparing section that compares the test data sequentially read from the respective memories under test with an expected value, and a detecting section that detects, on condition that one test data is not identical with the expected value, a writing fail for the memory under test that outputs this test data.
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