发明名称 ON-CHIP INTERCONNECT-STACK COOLING USING SACRIFICIAL INTERCONNECT SEGMENTS
摘要 <p>The present invention relates to an integrated-circuit device and to a method for fabricating an integrated-circuit device with an integrated fluidic-cooling channel. The method comprises forming recesses in a dielectric layer sequence at desired lateral positions of electrical interconnect segments and at desired lateral positions of fluidic-cooling channel segments. A metal filling is deposited in the recesses of the dielectric layer sequence so as to form the electrical interconnect segments and to form a sacrificial filling in the fluidic-cooling channel segments. Afterwards, the sacrificial metal filling is selectively removed from the fluidic-cooling channel segments.</p>
申请公布号 EP1964171(A2) 申请公布日期 2008.09.03
申请号 EP20060841455 申请日期 2006.12.19
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V.;ST MICROELECTRONICS CROLLES 2 SAS 发明人 GOSSET, LAURENT;ARNAL, VINCENT
分类号 H01L23/473 主分类号 H01L23/473
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