发明名称 Multilayer capacitor
摘要 A multi-terminal multilayer capacitor reducing an equivalent series inductance (ESL), whose design flexibility is high, in which cost of electrode material is low, and in which a structural defect hardly occurs includes lead portions of first and second internal electrodes and lead portions of third and fourth internal electrodes that are disposed along the length of each of two side surfaces so as to be alternately exposed. Preferably, the first and third internal electrodes, and the second and fourth internal electrodes are disposed so as to be arranged along the length of each side surface in a coplanar manner, with a predetermined distance provided between two internal electrodes. When viewed in a laminating direction of dielectric layers, a capacitor-forming portion of the first internal electrode does not overlap with a capacitor-forming portion of the fourth internal electrode, and a capacitor-forming portion of the second internal electrode does not overlap with a capacitor-forming portion of the third internal electrode.
申请公布号 US7420796(B2) 申请公布日期 2008.09.02
申请号 US20070926677 申请日期 2007.10.29
申请人 MURATA MANUFACTURING CO., LTD. 发明人 OTA TETSUHIKO
分类号 H01G4/06 主分类号 H01G4/06
代理机构 代理人
主权项
地址