发明名称 Forming a barrier layer in interconnect joints and structures formed thereby
摘要 Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a barrier layer on a substrate, wherein the barrier layer comprises molybdenum; and forming a lead free interconnect structure on the barrier layer.
申请公布号 US7416980(B2) 申请公布日期 2008.08.26
申请号 US20050078611 申请日期 2005.03.11
申请人 INTEL CORPORATION 发明人 ZHONG TING;DUBIN VALERY;FANG MING
分类号 H01L21/44 主分类号 H01L21/44
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