发明名称 METHOD FOR REDUCING AND EVENING THICKNESS OF SEMICONDUCTOR LAYER ON ELECTRICAL INSULATION MATERIAL SURFACE
摘要 PROBLEM TO BE SOLVED: To provide a method for evening a semiconductor layer of a SOI wafer without the need of costly additional exposure equipment. SOLUTION: In the method for reducing and evening the thickness of a semiconductor layer present on the surface of an electrical insulation material, the semiconductor layer surface is subjected to the action of an etchant. Its redox potential is adjusted as a function of the material and the desired final thickness of the semiconductor layer. Material erosion by the etchant per unit time of the semiconductor layer surface is lowered according to the thickness reduction of the semiconductor layer. In the case that the desired final thickness is achieved, the material erosion is carried out by only 0-10% of the thickness per 1 second. At the time, the method is executed without the action of light or the application of an external voltage. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008193100(A) 申请公布日期 2008.08.21
申请号 JP20080027990 申请日期 2008.02.07
申请人 SILTRONIC AG 发明人 FEIJOO DIEGO;RIEMENSCHNEIDER OLIVER;WAHLICH REINHOLD
分类号 H01L21/306;H01L27/12 主分类号 H01L21/306
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