发明名称 ANALOG MULTIPLE SIGNAL GENERATION CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To reduce a cost of an analog multiple signal generation circuit by reducing the number of serial converters to be smaller than the number of channels. <P>SOLUTION: Encoders 150-1 to 150-32 encode the signals of the corresponding channels. A logic adder 110 adds the same-order bits of the signal to be encoded and generates calculation results composed of five-digit binary number data and one-digit carry. When the carry is "0", the calculation result is output as it is. When the carry is "1", the whole digits of the calculation result are changed into "1". The serial converters 120-1 to 120-6 input the bits signals of the corresponding digits from the calculation results and convert them into series. Power phase correctors 130-1 to 130-6 perform the phase adjustment of the bit signals and power amplification corresponding to the digits. A multiplexer 140 performs analog multiplexing by adding signals to be corrected which are input from the power phase correctors 130-1 to 130-6. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2008193397(A) 申请公布日期 2008.08.21
申请号 JP20070025609 申请日期 2007.02.05
申请人 OKI ELECTRIC IND CO LTD 发明人 SAITO JUICHI;KAJIMA MASAYUKI;TSUJIKADO MITSUO
分类号 H03K19/20 主分类号 H03K19/20
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