发明名称 Method and apparatus for a chaotic computing module
摘要 A logic gate array for implementing logical expressions is provided. The array includes a dynamically configurable logic gate having a chaotic updater for causing the logic gate to alternately operate as one of a several different logic gate types, the dynamically configurable logic gate alternating from operating as one logic gate type to a different logic gate type in response to one or more reference signals. The array also includes one or more additional logic gates.
申请公布号 US7415683(B2) 申请公布日期 2008.08.19
申请号 US20050304125 申请日期 2005.12.15
申请人 UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.;CONTROL DYNAMICS, INC. 发明人 DITTO WILLIAM L.;MURALI KRISHNAMURTHY;SINHA SUDESHNA
分类号 G06F17/50;G06F;G06F7/38;G06G7/00;G06G7/38;G06N7/08;H03K17/693;H03K19/173 主分类号 G06F17/50
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