发明名称 INSTRUCTION CACHE PRE-FETCH CONTROL METHOD AND DEVICE THEREOF
摘要 PROBLEM TO BE SOLVED: To enhance a processing efficiency in a pre-fetch operation. SOLUTION: The instruction pre-fetch control device includes a CPU 2 and an instruction cache part 10, wherein the instruction cache part has an instruction cache data memory 11, a pre-fetch buffer 14, an instruction cache write control part 15, and a hit or error determination access control part 12 which transfers an instruction string from the pre-fetch buffer 14 to the instruction cache data memory 11 and stores it in the instruction cache data memory 11 when the CPU 2 makes a fetch request for the instruction string stored in the pre-fetch buffer 14, and transfers the instruction string from the pre-fetch buffer 14 to the instruction cache data memory 11 according to a branch type, determines whether to store the instruction string and controls the instruction string when a branch occurs before the CPU 2 executes the instruction string stored in the pre-fetch buffer 14 or when the next instruction string of an instruction string of a branch destination is stored in the pre-fetch buffer 14. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008186233(A) 申请公布日期 2008.08.14
申请号 JP20070019083 申请日期 2007.01.30
申请人 TOSHIBA CORP 发明人 UCHIYAMA MASATO
分类号 G06F12/08;G06F9/38 主分类号 G06F12/08
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