发明名称 |
COMPUTATION PROCESSOR, INFORMATION PROCESSOR, AND COMPUTING METHOD |
摘要 |
<p>Occurrence of carry-out caused by rounding of a floating-point number is quickly determines to speed up computation. An LZ predictor (130) determined the left shift amount from the result of absolute value addition by an absolute value adder (120) and outputs it to a left shifter (140) and a predicting section (160). The left shifter (140) shifts the absolute addition result leftward by the left shift amount and carries out normalization. The predicting section (160) predicts if each block of four bits constituting a region 1 and region 2 is included in the rounding region after the normalization, and outputs the prediction result representing whether or not all the bits included in the rounding region are "1". A CO detecting section (170) detects if carry-out caused by rounding by the rounding section (150) occurs by using the prediction result and a part of the bits of the normalization results, and outputs "1" if carry-out has occurred.</p> |
申请公布号 |
WO2008096446(A1) |
申请公布日期 |
2008.08.14 |
申请号 |
WO2007JP52396 |
申请日期 |
2007.02.09 |
申请人 |
FUJITSU LIMITED;TAJIRI, KUNIHIKO |
发明人 |
TAJIRI, KUNIHIKO |
分类号 |
G06F7/499;G06F7/483 |
主分类号 |
G06F7/499 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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