发明名称 Method of integrating triple gate oxide thickness
摘要 A method for forming TGO structures includes providing a substrate containing regions of first, second and third kinds in which devices with respective first, second and third gate oxide layers of different thicknesses are to be formed. The second gate oxide layer is formed over the substrate and then removed from regions of the first kind where the first gate oxide layer is subsequently grown. A first conductive layer is deposited over the substrate. The first conductive layer and second gate oxide layer are subsequently removed from regions of the third kind. The third gate oxide layer followed by deposition of a second conductive layer is formed over the substrate and then removed except from over regions of the third kind.
申请公布号 US7410874(B2) 申请公布日期 2008.08.12
申请号 US20060481213 申请日期 2006.07.05
申请人 CHARTERED SEMICONDUCTOR MANUFACTURING, LTD. 发明人 VERMA PURAKH RAJ;CHU SANFORD;CHUA HWEE NGOH
分类号 H01L21/77 主分类号 H01L21/77
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