| 摘要 |
A data input circuit of a semiconductor memory device and a data input operating method thereof, in which data input margin can be secured. The data input circuit includes a strobe buffer that receives an external data strobe signal in response to a data input signal and outputs a data strobe signal, data input buffers that receive external input data, respectively, in response to the data input signal and output input data, respectively, an input controller that generates input latch signals and strobe pulse signals based on the data strobe signal, an output latch signal generator that generates an output latch signal in response to a clock signal and a write instruction, latches that latch the input data, respectively, in response to the input latch signals and output latch data, respectively, multiplexers that receive the latch data, respectively, and output multiplexed data, respectively, and data sense amplifiers that sense and amplify the multiplexed data, respectively, in response to the strobe pulse signals and output amplified data to global I/O lines, respectively, in response to the output latch signal.
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