发明名称 |
METHOD AND SYSTEM FOR LOGIC DESIGN FOR CELL PROJECTION PARTICLE BEAM LITHOGRAPHY |
摘要 |
<p>A method for particle beam lithography, such as electron beam (EB) lithography, includes predefining a stencil design having a plurality of cell patterns with information from a cell library, fabricating the stencil design, synthesizing a functional description into a logic circuit design after predefining the stencil design so that one or more characteristics of the stencil design are considered during synthesizing of the functional description into the logic circuit design, optimizing the logic circuit design, generating a layout design from the optimized logic circuit design, and forming the logic circuit on a substrate according to the stencil design and the layout design.</p> |
申请公布号 |
WO2008094343(A1) |
申请公布日期 |
2008.08.07 |
申请号 |
WO2007US85822 |
申请日期 |
2007.11.29 |
申请人 |
D2S, INC.;FUJIMURA, AKIRA;MITSUHASHI, TAKASHI;YOSHIDA, KENJI |
发明人 |
FUJIMURA, AKIRA;MITSUHASHI, TAKASHI;YOSHIDA, KENJI |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|