发明名称 M-ALGORITHM PROCESSING METHOD, AND M-ALGORITHM PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide an M-algorithm processing method and a constitution thereof that have a smaller computational quantity than MLD and a smaller circuit scale than ASESS, and facilitate high-speed processing by parallel processing. SOLUTION: In the M-algorithm processing, (p) v-value symbol replicas increasing likelihood are narrowed down and selected out of the v-value symbol replicas using a quadrant table 202, and then likelihood calculation and surviving replica selection are performed. Consequently, a necessary computational quantity is reduced to p/v time as large as that of conventional M-algorithm, and only nearby (p) symbols are selected without ranking all the symbols, so that necessary resolution of the quadrant decision table 202 can be suppressed low and the circuit scale can be made smaller than that of ASESS. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008182332(A) 申请公布日期 2008.08.07
申请号 JP20070012692 申请日期 2007.01.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 IGAI KAZUNORI;KIMURA RYOHEI;OKA NAOTO
分类号 H04J99/00;H04B7/04 主分类号 H04J99/00
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