发明名称 Self-coplanarity bumping shape for flip-chip
摘要 A stud bump structure for electrical interconnection between a pair of members includes a base portion, and a stem portion. The base portion is affixed to a pad or trace in one of the pair of members to be interconnected (such as an integrated circuit chip), and the stem end is configured to contact a metal pad on the other member (such as a printed circuit board) to complete the interconnect. According to the invention, the stem end is truncated to form a transverse plane, and the stem is more compliant than the base. Also, a method for forming a stud bump on a contact surface, includes forming a bump base portion on the surface, drawing out a generally conical tail from a top of the base, and truncating the tail to form a stem portion having a planar transverse top surface and having a length from the top of the base portion to the top surface. In some embodiments the tail portion, at least, of the stud bump is formed using a wire bonding tool. Also, a method for forming an interconnect between a first member and a second member of an electronic package includes providing one of the members with the stud bumps of the invention and then bringing the corresponding bumps and pads together in a bonding process, the compliance of the stems portions of the bumps accommodating the variance from coplanarity of the pad surfaces.
申请公布号 US7407877(B2) 申请公布日期 2008.08.05
申请号 US20050145247 申请日期 2005.06.03
申请人 CHIPPAC, INC. 发明人 KWEON YOUNG-DO;PENDSE RAJENDRA D.;AHMAD NAZIR;KIM KYUNG-MOON
分类号 H01L21/44;H01L21/48;H01L21/50;H01L21/60;H01L23/48;H01L23/485;H01L23/498;H01L23/52 主分类号 H01L21/44
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