发明名称 FABRICATING METHODS OF SEMICONDUCTOR DEVICE USING SELF-ALIGN METAL SHUNT PROCESS
摘要 A method for fabricating a semiconductor device using a self-align metal layer shunt process is provided to pattern an interlayer insulating layer, to expose an upper surface of a sacrifice pattern, and to remove the exposed sacrifice pattern selectively for etching only the interlayer insulating layer remaining on the sacrifice pattern, thereby preventing short circuit resulting from excessive etching of the interlayer insulating layer. A device isolation layer pattern(110) limiting active regions is formed on a semiconductor substrate(100). A mask pattern(170) is formed on a lower conductive pattern(130) to expose an upper surface of an interlayer insulating layer(160). The interlayer insulating layer is anisotropy-etched by using the mask pattern as an etching mask to form a preliminary trench(180) exposing an upper surface of a sacrifice pattern(140). Depth of the preliminary trench is the same as one of the interlayer insulating layer remaining on the sacrifice pattern. An impurity region(150) is not exposed by the preliminary trench.
申请公布号 KR20080069431(A) 申请公布日期 2008.07.28
申请号 KR20070007134 申请日期 2007.01.23
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 JON, YEOL;CHUNG, EUN KUK;KIM, JOON;KIM, JIN HONG
分类号 H01L21/336 主分类号 H01L21/336
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