发明名称 PARALLEL BIT TEST APPARATUS CAPABLE OF REDUCING TEST TIME AND METHOD THEREOF
摘要 A PBT(Parallel Bit Test) apparatus and a method thereof are provided to reduce test cost by decreasing test time. According to a parallel bit test(PBT) apparatus comprised in each chip stacked in a multi chip package, a comparison part(420) outputs a representative data signal by judging consistency of a data signal inputted to perform a parallel bit test. A coding part(450) outputs the representative data signal to a desired data signal line, in response to a first test MRS signal. The first test MRS signal controls so that representative data signals outputted from each coding part comprised in the chip are outputted from different data signal line.
申请公布号 KR20080065483(A) 申请公布日期 2008.07.14
申请号 KR20070002651 申请日期 2007.01.09
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHO, YONG HWAN;CHEON, KWUN SOO;JANG, HYUN SOON;SEO, SEUNG WHAN
分类号 G11C29/00 主分类号 G11C29/00
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