METHOD AND STRUCTURE FOR FORMING STRAINED Si FOR CMOS DEVICES,申请号EP20040810466-传众专利搜索

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发明名称	METHOD AND STRUCTURE FOR FORMING STRAINED Si FOR CMOS DEVICES
摘要
申请公布号	EP1680804(A4)	申请公布日期	2008.07.09
申请号	EP20040810466	申请日期	2004.11.05
申请人		发明人
分类号	H01L21/762;H01L21/20;H01L21/265;H01L21/336;H01L21/8238;H01L29/10;H01L29/78	主分类号	H01L21/762
代理机构		代理人
主权项
地址

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