发明名称 Flip-flop circuit including latch circuits
摘要 A flip-flop circuit capable of inhibiting current consumption as well as the circuit scale from increase is provided. This flip-flop circuit comprises a first latch circuit including first and second inverter circuits. A first power supply line capable of switching a supplied potential between a fixing potential supplied for fixing the potentials of output nodes of the first and second inverter circuits and a floating potential supplied for floating the potentials of the output nodes of the first and second inverter circuits is connected to the first latch circuit.
申请公布号 US7397286(B2) 申请公布日期 2008.07.08
申请号 US20050274298 申请日期 2005.11.16
申请人 SANYO ELECTRIC CO., LTD. 发明人 MIYAMOTO HIDEAKI
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
主权项
地址