发明名称 CLOCK GENERATING CIRCUIT AND DIGITAL CIRCUIT SYSTEM INCORPORATING THE SAME
摘要 A digital circuit system includes: a register, for receiving and registering digital data; an operation unit, for operating and generating resulting data according to the digital data registered in the first registering unit; a second register, for receiving and registering the resulting data; a multi-phase clock signal generating unit, for generating a plurality of reference clock signals having different phases with each other; a first selector, for selecting one of the reference clock signals to output a first clock signal to the first registering unit; and a second selector, for selecting another of the reference clock signals to output a second clock signal to the second registering unit.
申请公布号 US2008162975(A1) 申请公布日期 2008.07.03
申请号 US20070965736 申请日期 2007.12.28
申请人 CHEN YI-LIN 发明人 CHEN YI-LIN
分类号 G06F1/06 主分类号 G06F1/06
代理机构 代理人
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