| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a wafer-level package having excellent CTE performance including a preformed die acceptance cavity and/or a substrate with a terminal contact metal pad formed in the upper surface of the substrate. <P>SOLUTION: A die is arranged in the die acceptance cavity by bonding, and a dielectric layer is formed on the die and the substrate. At least one rewiring buildup layer (RDL) is formed on the dielectric layer and is connected to a die via a contact pad. A connection structure, for example an UBM 18, is formed on the rewiring buildup layer. A plurality of terminal conductive bumps 20 are connected to the UBM 18. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
